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Does any RISC-V Distro/Board Meet these Needs ?
When dealing with ARM and RISC-V devices one constant I see is that distros or devs will make a specific image for a device. This image usually lacks a few things I am used to. On X86 the norm is to have an installer where I can make many choices such as whether to have full disk encryption, choose which DE I want, choose which device to install to (such as NVME) and choose my filesystem type. Does any distro do this for any RISC-V board ?
- farside.link RISC-V State of the Union - Krste Asanović, SiFive
Learn about the current highlights and roadmap of RISC-V by RISC-V's chief architect. Details and slides: https://riscv-europe.org/summit/2024/conference#risc-v-state-of-the-union
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Hardware Study Groups Revisited
cross-posted from: https://lemm.ee/post/36326370
> Hey Everyone, > > I'm very happy to see the engagement in my last post... Hoping to improve my communication skills and reduce my verbosity in the next couple of discussions. > > I feel like it is due time to follow-up on what I posted on this board last year. That is, to follow through with "full-stack" hardware-software-application study groups. > > If any of you still are interested, I'd like to open up this form for discussion of how that group should be run. > > On the subject of HDLs (Hardware Description Languages), VHDL (Verilog HDL) could be fun for some of us to try together. Architecture is also a large concept frequently glossed-over, enciphered with too much jargon, or taught in a very "academic" fashion with very little discussion between students... The traditional classroom model, from what I experienced, is not too conducive to neurodivergent learning styles. > > On that note, the RISC-V processor architecture could provide an amazing opportunity to gain a low-to-high understanding. Starting from the Silicon, where we delve into unit operations for chip manufacturing, fundamental solid state / condensed matter physics, and some mathematical models to describe the underlying phenomena. Then we will proceed to what can actually be configured in the ensemble of devices that constitute your "computer". What is a "piece of logic"? How do transistors actually operate? Why do certain design topologies make more sense than others...? And so forth. > > We would conclude with some software projects like writing an I/O driver for a keyboard, or pool a fund together for some type of chip we design in EDA together. Overall, it sounds like a great idea for us all to increase our technology literacy, have a fun hobby group to hang out with, and to feel like you own every part of your computer. > > On top of this, I feel that we should discuss FOSS tools with each other, as well as how they are best implemented to accomplish common tasks. I've punted the majority of my "Big Tech" stack to the curb the last 5-ish years. > > TUI tools as well as CLI interaction is a paradigm of computer operation that I feel many of us have been sleeping on. It also has helped me understand how GUI applications can be better suited for the task at hand, versus when I should be using a terminal emulator to navigate the directory hierarchy instead. Many of you are more versed in programming than I am, so I would love to hear your thoughts. > > We could even come up with a project for mobile, who knows? Not sure about the format, whether or not this would be synchronous, and the time commitment and sustainment of motivation throughout a probably 8 week period. However, I feel like a realistic solution for us all to get something meaningful out of an experience like this exists. > > Any thoughts on how to get this up and going? What would we need to do on our first meeting together? What things would you want to learn in this course? It seems to me that many of us are already quite literate in sub-domains of what we are interested in. Maybe a teacher carousel routine could be adopted? Where we adopt a general "roadmap" curriculum, and, in an ad hoc fashion, assign people to be the instructor for the desired lesson? Then that person could go and create a slide deck in Beamer, or prepare a presentation with an overhead camera or digital drawing device to use as a teaching medium. > > Those are just some ideas. Really looking forward to hearing what all of you think about this.
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The Banana Pi BPI-F3 may have the SpacemiT K1, but it is an ARSE product
YouTube Video
Click to view this content.
- liliputing.com Milk-V Jupiter is a mini ITX board with a SpacemiT K1/M1 RISC-V processor - Liliputing
Milk-V Jupiter is a mini ITX board with a SpacemiT K1/M1 RISC-V processor
- liliputing.com Pine64 Oz64 is a single-board PC with ARM and RISC-V CPU cores - Liliputing
Pine64 Oz64 is a single-board PC with ARM and RISC-V CPU cores
- frame.work Introducing a new RISC-V Mainboard from DeepComputing
We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture.
- liliputing.com Sipeed Lichee Book 4A is a cheap RISC-V laptop with an upgradeable processor module - Liliputing
Sipeed Lichee Book 4A is a cheap RISC-V laptop with an upgradeable processor module
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Framework: Introducing a new RISC-V Mainboard from DeepComputing
frame.work Introducing a new RISC-V Mainboard from DeepComputingWe’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture.
We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture today, and it’s probably not the one you think it is. The team at DeepComputing has built the first ever partner-developed Mainboard, and it uses a RISC-V processor! This is a huge milestone both for expanding the breadth of the Framework ecosystem and for making RISC-V more accessible than ever. We designed the Framework Laptop to enable deep flexibility and personalization, and now that extends all the way to processor architecture selection. DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week, and we’ll be sharing more as this program progresses.
- frame.work Introducing a new RISC-V Mainboard from DeepComputing
We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture.
cross-posted from: https://lemmy.ml/post/17020181
> Introducing a new RISC-V Mainboard from DeepComputing
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DeepComputing is announcing a RISC-V motherboard for the Framework Laptop 13
DeepComputing is preparing a RISC-V based motherboard to be used in existing Framework Laptop 13s!
Some snippets from the Framework blog post (the link to which is provided below):
> The DeepComputing RISC-V Mainboard uses a JH7110 processor from StarFive which has four U74 RISC-V cores from SiFive.
> This Mainboard is extremely compelling, but we want to be clear that in this generation, it is focused primarily on enabling developers, tinkerers, and hobbyists to start testing and creating on RISC-V.
> DeepComputing is also working closely with the teams at Canonical and Red Hat to ensure Linux support is solid through Ubuntu and Fedora.
> DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week.
Announcement: https://frame.work/blog/introducing-a-new-risc-v-mainboard-from-deepcomputing
The upcoming product page (no price/availability yet): https://frame.work/products/deep-computing-risc-v-mainboard
Edit: Adding link the the announcement by DeepComputing: https://deepcomputing.io/a-risc-v-world-first-independently-developed-risc-v-mainboard-for-a-framework-laptop-from-deepcomputing/
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Banana Pi BPI-F3: Octa Core RISC-V SBC Running Bianbu OS
YouTube Video
Click to view this content.
cross-posted from: https://slrpnk.net/post/10609203
- liliputing.com LuckFox Pico Ultra is a micro dev board with PoE and a Rockchip RV1106 ARM/RISC-V chip - Liliputing
LuckFox Pico Ultra is a micro dev board with PoE and a Rockchip RV1106 ARM/RISC-V chip
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Canonical Announce First RISC-V Laptop Running Ubuntu
www.omgubuntu.co.uk Canonical Announce First RISC-V Laptop Running Ubuntu - OMG! UbuntuA RISC-V laptop preloaded with Ubuntu is in development, and Canonical is involved. The DC-ROMA RISC-V Laptop II is made by DeepComputing, a company
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Milk-V Meles RISC-V single-board computer is now available for $80
liliputing.com Milk-V Meles RISC-V single-board computer is now available for $80 - LiliputingMilk-V Meles RISC-V single-board computer is now available for $80
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Why RISC-V must get its messaging right on open standard vs open source
www.theregister.com RISC-V battles to get messaging right over open standardIt's the difference between export limits on specific chips – and a problematic blanket ban
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Open Source RISC-V projects
Been studying RISC-V for... I think a year now. Bought the booklet outlining the ISA's modules, and have been working down from there.
I have seen various startups and actual products, as well as a bunch of simulators, but I haven't really seen any projects trying to design a RISC-V CPU from the ground up.
Are there any groups doing this? I don't think I'm at a point where I could meaningfully contribute, I'm mostly interested for educating myself.
- www.notebookcheck.net Banana Pi BPI-F3: Single-board computer and RISV-V alternative to the Raspberry Pi now available
The Banana Pi BPI-F3 is a new single-board computer that is now available. The system can be seen as a (strong) alternative to the Raspberry Pi and comes in two model variants.
- wccftech.com Chinese Startup Unveils The First RISC-V Based AI CPU, Powers The K1 Domestic Laptop
The AI hype has made its way into RISC-V architectures, as the Chinese startup SpacemiT unveils a new customized CPU, targeting AI computing.
- www.theregister.com Google pulls RISC-V support from generic Android kernel
Not a great omen if you were hoping to own a future RV smartphone – tho web giant says it hasn't totally given up
cross-posted from: https://lemmy.ml/post/15134844
> Google pulls RISC-V support from generic Android kernel
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The Future is RISC-Y (LMG Clips / LTT Podcast)
farside.link The Future is RISC-YJim Keller of Tenstorrent answers community questions about RISC V and its future. Watch the full WAN Show: https://www.youtube.com/watch?v=OnVUXC9Fou4 ► GET MERCH: https://lttstore.com ► GET EXCLUSIVE CONTENT ON FLOATPLANE: https://lmg.gg/lttfloatplane ► SPONSORS, AFFILIATES, AND PARTNERS: https...
direct link to Youtube: https://www.youtube.com/watch?v=3i12nDgzXIg
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US government reportedly ponders crimping China's use of RISC-V
www.theregister.com US government reportedly probes China’s use of RISC-VPermissive licenses may be about to collide with geopolitics
cross-posted from: https://lemmy.world/post/14636398
> US government reportedly ponders crimping China's use of RISC-V
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Can someone explain to me the brief process used to create the meta-pine64 minimal image here?
github.com GitHub - Fishwaldo/meta-pine64: Yocto Images for Star64 and PineTabV Boards from pine64Yocto Images for Star64 and PineTabV Boards from pine64 - Fishwaldo/meta-pine64
I'm asking this because I'm very new to the Yocto project. I'm going through the documentation but it's a bit overwhelming to me, looking at what
Fishwaldo
has achieved (link embedded in the title). I would like to learn how he did it and how I could create my own image based on a supported kernel with necessary drivers and boot theStar64
board.From what I understand, he:
- Forked the kernel tree and created his own branch.
- Put in the necessary drivers (including OEM drivers) - I'm not really sure how he did it since I'm new to Linux (any tips would be appreciated!).
- I can't quite make out the layers he used to build the minimal image (I will study the guide more to figure this out).
- Finally, he compiled it, alongside compiling U-boot, partitioned the SD-card and booted the device.
Am I right? I'm missing a lot of steps in the middle, would really appreciate any help in understanding this. Thanks!
- www.tomshardware.com Firebrand ex-Arm China CEO founds RISC-V processor startup
Allen Wu goes RISC-V.
- www.digitimes.com SiFive unveils the HiFive Premier P550 RISC-V development board
At Embedded World on April 9, SiFive, Inc., the pioneer and leader of RISC-V computing, unveiled its new state-of-the-art RISC-V development board, the HiFive Premier P550.
- www.theregister.com Chinese schools testing 10,000 locally made RISC-V-ish PCs
Today's lesson covers the potential for Loongson's made-in-China architecture to hurt Microsoft and Intel
cross-posted from: https://lemmy.ml/post/14085489
> Chinese schools testing 10,000 locally made RISC-V-ish PCs
- www.tomshardware.com China-made RISC-V PCIe 5.0 SSD controller promises competitive performance — up to 14.2 GB/s without a fan
Yingren takes the fight to Phison and Silicon Motion with the new YRS820 PCIe 5.0 SSD controller.
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Alibaba's research arm promises server-class RISC-V processor due this year
www.theregister.com Alibaba’s research arm teases server-class RISC-V processorAnd teases a laptop to show off its current silicon – running the open edition of Huawei’s CentOS spinout
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Leaked docs hint Google may use SiFive RISC-V cores in next-gen TPUs
www.theregister.com Leaked doc suggest Google may buy more SiFive cores for TPUsWould put those AI accelerators out of Arm's reach, at least
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RISC-V Options?
Hey everyone,
I've noticed this community is a bit barren. I'd like to add some posts myself but from a more ignorant POV.
It has come to my attention that there is not nearly enough software torture in my life. Hearing how companies are starting to add barriers to so-called "Translation layers" and other software pieces that give functionality to the underlying hardware...
What types of projects does the open source community need to pursue with respect to RISC-V drivers, firmware, or other necessary pieces to somewhat guarantee that the processor is compatible with GPUs, RAM, I/O, and other low level functions that hardware components perform?
Where should I start in my RISC-V journey? Is there a beginner computer or developer kit that I can purchase that won't incinerate my wallet? I don't expect to game or train LLMs off of a RISC-V-based computer, but am curious as to what a fully free hardware setup would consist of.
Love the idea of RISC-V!
- www.eenewseurope.com $99 RISC-V dev board adds Raspberry Pi, Clik board interfaces
The $132 PolarFire Discovery kit is based on a Microchip MPFS095T FPGA with a quad-core, RISC-V 64bit Linux processor and 95K of logic
- www.eenewseurope.com Edge AI chiplet uses SemiDynamics RISC-V cores
YorChip is developing a 12nm edge AI chiplet design that will be under 25 sq mm using RISC-V cores from Semidynamics in Barcelona.